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INTEGRATED CIRCUITS
DATA SHEET
SAA5254 Integrated VIP and teletext decoder (IVT1.1X)
Preliminary specification Supersedes data of July 1993 File under Integrated Circuits, IC02 1996 Nov 07
Philips Semiconductors
Preliminary specification
Integrated VIP and teletext decoder (IVT1.1X)
FEATURES * Complete teletext decoder including page memory and FASTEXT links in a 40-pin DIP package * Automatic processing of extension packet 26 for widest possible language decoding. All our standard language options can be available, and language option is readable via I2C-bus * 100% hardware compatible with the SAA5244A; plug-in replacement and extra market * 100% hardware compatible with the SAA5244A, except if the special OSD symbols were used with the SAA5244A, except ROM identification number * The device is pin-aligned with the other members of the new Philips teletext decoder family, i.e. SAA5280 and the SAA5249, making one hardware solution for the full range * Low software overhead for the control microprocessor * Single page acquisition system * RGB interface to standard colour decoder ICs, push-pull output drive * Separate text and video signal quality detectors. ORDERING INFORMATION TYPE NUMBER SAA5254P PACKAGE NAME DIP40 DESCRIPTION plastic dual in-line package; 40 leads (600 mil)
SAA5254
DESCRIPTION The Integrated VIP and Teletext decoder (IVT1.1X) is designed to decode 625-line based World System Teletext transmissions. This single-chip teletext decoder hardware is based on the SAA5244A with which it is completely compatible. Like the SAA5244A the device contains all the hardware necessary to decode the teletext, but the SAA5254 also contains extra hardware to process the extension packet 26 characters automatically, extending the markets to which the TV chassis can be shipped and opening the possibility of many more language options.
VERSION SOT129-1
QUICK REFERENCE DATA SYMBOL VDD IDD Vsync Vvideo fXTAL Tamb supply voltage supply current sync voltage amplitude video voltage amplitude crystal frequency operating ambient temperature PARAMETER 4.5 - 0.1 0.7 - -20 MIN. 5.0 90 0.3 1.0 27 - TYP. MAX. 5.5 120 0.6 1.4 - +70 V mA V V MHz C UNIT
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Philips Semiconductors
Preliminary specification
Integrated VIP and teletext decoder (IVT1.1X)
BLOCK DIAGRAM
SAA5254
Y
BLAN
COR RGBREF
RGB
ODD/EVEN
23
19
21
18
15 to 17 22
DISPLAY
HAMMING CHECKER AND PACKET 26 PROCESSING ENGINE
PAGE MEMORY DATA SLICER AND CLOCK REGENERATOR TELETEXT ACQUISITION AND DECODING
25 I 2 C-BUS INTERFACE 24
SDA SCL
DCVBS 1 VSS1 5 10 VDD1 VDD2 VSS2 VSS3
SAA5254
ANALOG TO DIGITAL CONVERTER TIMING CHAIN
14 20
REF
6
OSCOUT OSCIN
2 3 CRYSTAL OSCILLATOR
INPUT CLAMP AND SYNC SEPARATOR
DISPLAY CLOCK PHASE LOCKED LOOP 11 13 12
4
7
9
8
MLB207
OSCGND
BLACK IREF CVBS POL
VCR/FFB STTV/LFB
Fig.1 Block diagram; SOT129 (DIP40).
1996 Nov 07
3
Philips Semiconductors
Preliminary specification
Integrated VIP and teletext decoder (IVT1.1X)
PINNING SYMBOL VDD1 OSCOUT OSCIN OSCGND VSS1 REF+ BLACK CVBS IREF VDD2 POL STTV/LFB VCR/FFB VSS2 R G B RGBREF BLAN VSS3 COR ODD/EVEN Y SCL SDA i.c. PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 to 40 +5 V supply 1 27 MHz crystal oscillator output 27 MHz crystal oscillator input 0 V crystal oscillator ground 0 V ground 1 DESCRIPTION
SAA5254
Positive reference voltage for the ADC. This pin should be connected to +5 V. Video black level storage pin, connected to ground via a 100 nF capacitor. Composite video input pin. A positive-going 1 V (peak-to-peak) input is required, connected via a 100 nF capacitor. Reference current input pin, connected to ground via a 27 k resistor. +5 V supply 2 STTV/LFB/FFB polarity selection pin Sync to TV output pin/line flyback input pin. Function controlled by an internal register bit (scan sync mode). PLL time constant switch/field flyback input pin. Function controlled by an internal register bit (scan sync mode). 0 V ground 2 Dot rate character output of the RED colour information. Dot rate character output of the GREEN colour information. Dot rate character output of the BLUE colour information. DC input voltage to define the output high level on the RGB pins. Dot rate fast blanking output. 0 V ground 3 Programmable active LOW output to provide contrast reduction of the TV picture for mixed text and picture displays or when viewing newsflash/subtitle pages; open drain output. 25 Hz output synchronized with the CVBS inputs field sync pulses to produce a non-interlaced display by adjustment of the vertical deflection currents. Dot rate character output of teletext foreground colour information; open drain output. Serial clock input for the I2C-bus. It can still be driven during power-down of the device. Serial input/output data port for the I2C-bus; open drain output. It can still be driven during power-down of the device. Internally connected. Must be left open-circuit in application.
1996 Nov 07
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Philips Semiconductors
Preliminary specification
Integrated VIP and teletext decoder (IVT1.1X)
SAA5254
VDD1 OSCOUT OSCIN OSCGND VSS1 REF BLACK CVBS IREF
1 2 3 4 5 6 7 8 9
40 39 38 37 36 35 34 33 32 31 i.c.
VDD2 10 POL 11 STTV/LFB 12 VCR/FFB 13 VSS2 14 R 15 G 16 B 17 RGBREF 18 BLAN 19 VSS3 20
SAA5254
30 29 28 27 26 25 SDA 24 SCL 23 Y 22 ODD/EVEN 21 COR
MLB208
Fig.2 Pin configuration; SOT129 (DIP40).
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Philips Semiconductors
Preliminary specification
Integrated VIP and teletext decoder (IVT1.1X)
QUALITY AND RELIABILITY
SAA5254
This device will meet Philips Semiconductors General Quality Specification for Business group "Consumer Integrated Circuits SNW-FQ-611-Part E". The principal requirements are shown in Tables 1 to 4. Group A Table 1 Acceptance tests per lot TEST Mechanical Electrical Group B Table 2 Processability tests (by package family) TEST Solderability Mechanical Solder heat resistance Group C Table 3 Reliability tests (by process family) TEST Operational life Humidity life CONDITIONS 168 hours at Tj = 150 C temperature, humidity, bias (1000 hours, 85 C, 85% RH or equivalent test) Tstg(min) to Tstg(max) REQUIREMENTS(1) < 1500 FPM; equivalent to < 100 FITS at Tj = 70 C < 2000 FPM CONDITIONS REQUIREMENTS(1) < 7% LTPD < 15% LTPD < 15% LTPD CONDITIONS REQUIREMENTS(1) cumulative target < 100 ppm cumulative target < 100 ppm
Temperature cycling performance
< 2000 FPM
Table 4 Reliability tests (by device type) TEST ESD and latch-up CONDITIONS ESD Human body model 2000 V, 100 pF, 1.5 k ESD Machine model 200 V, 100 pF, 1.5 k latch-up 100 mA, 1.5 x VDD (absolute maximum) Notes to Tables 1 to 4 1. ppm = fraction of defective devices, in parts per million. LTPD = Lot Tolerance Percent Defective. FPM = fraction of devices failing at test condition, in Failures Per Million. FITS = Failures In Time Standard. REQUIREMENTS(1) < 15% LTPD < 15% LTPD < 15% LTPD
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Philips Semiconductors
Preliminary specification
Integrated VIP and teletext decoder (IVT1.1X)
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL VDD VI VO IO IIOK Tamb PARAMETER supply voltage (all supplies) input voltage (any input) output voltage (any output) output current (each output) DC input or output diode current operating ambient temperature -0.3 -0.3 -0.3 -10 -20 -20 MIN. MAX. +6.5 VDD + 0.5 VDD + 0.5 +10 +20 +70
SAA5254
UNIT V V V mA mA C
CHARACTERISTICS VDD = 5 V 10%; Tamb = -20 to +70 C, unless otherwise specified. SYMBOL Supply VDD IDD(tot) Inputs CVBS Vsync td(sync) sync voltage amplitude delay from CVBS to TCS output from STTV buffer (nominal video, average of leading/trailing edge) change in sync delay between all black and all white video input at nominal levels video input voltage amplitude (peak-to-peak value) display PLL catching range source impedance input capacitance 0.1 -150 0.3 0 0.6 +150 V ns supply voltage total supply current 4.5 - 5.0 90 5.5 120 V mA PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
td(sync)
0
-
25
ns
Vvideo(p-p) PLLcatch Zsource Ci IREF RGND POL VIL VIH ILI Ci
0.7 7 - - - -0.3 2.0 VI = 0 to VDD -10 -
1.0 - - - 27 - - - -
1.4 - 250 10 - +0.8 +10 10
V % pF
resistance to ground
k
LOW level input voltage HIGH level input voltage input leakage current input capacitance
V A pF
VDD + 0.5 V
1996 Nov 07
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Philips Semiconductors
Preliminary specification
Integrated VIP and teletext decoder (IVT1.1X)
SYMBOL LBF VIL VIH ILI II td(LFB) VCR/FFB VIL VIH ILI II VI ILI IDC SCL VIL VIH ILI fSCL ti(r) ti(f) Ci LOW level input voltage HIGH level input voltage input leakage current clock frequency input rise time input fall time input capacitance 10% to 90% 90% to 10% VI = 0 to VDD -0.3 3.0 -10 0 - - - - - - - - - - LOW level input voltage HIGH level input voltage input leakage current input current VI = 0 to VDD note 1 -0.3 2.0 -10 -1 -0.3 VI = 0 to VDD -10 - - - - - - - - LOW level input voltage HIGH level input voltage input leakage current input current delay between LFB front edge and input video line sync VI = 0 to VDD note 1 -0.3 2.0 -10 -1 - - - - - 250 PARAMETER CONDITIONS MIN. TYP.
SAA5254
MAX.
UNIT
+0.8 +10 +1 -
V A mA ns
VDD + 0.5 V
+0.8 +10 +1
V A mA
VDD + 0.5 V
RGBREF (note 2) input voltage input leakage current DC current VDD + 0.5 V +10 10 A mA
+1.5 +10 100 2 2 10
V A kHz s s pF
VDD + 0.5 V
Inputs/outputs CRYSTAL OSCILLATOR (OSCIN; OSCOUT) fXTAL Gv Gm Ci CFB BLACK Cblack ILI storage capacitor to ground input leakage current VI = 0 to VDD - -10 100 - - +10 nF A crystal frequency small signal voltage gain mutual conductance input capacitance feedback capacitance f = 100 kHz - 3.5 1.5 - - 27 - - - - - - - 10 5 mA/V pF pF MHz
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Philips Semiconductors
Preliminary specification
Integrated VIP and teletext decoder (IVT1.1X)
SYMBOL SDA VIL VIH ILI Ci ti(r) ti(f) VOL to(f) CL Outputs STTV GSTTV VTCS VDCshift IO CL R, G AND B VOL VOH Zo CL IDC to(r) to(f) BLAN VOL VOH LOW level output voltage HIGH level output voltage IOL = 1.6 mA IOH = -0.2 mA; VDD = 4.5 V with external pull-up 10% to 90% 90% to 10% 0 1.1 - - - - - - - LOW level output voltage HIGH level output voltage output impedance load capacitance DC current output rise time output fall time 10% to 90% 90% to 10% IOL = 2 mA IOH = -1.6 mA; RGBREF VDD - 2 V 0 RGBREF -0.25 V - - - - - - gain of STTV relative to video input TCS voltage amplitude DC voltage shift between TCS output and nominal video output output drive current load capacitance 0.9 0.2 - - - 1.0 0.3 - - - LOW level input voltage HIGH level input voltage input leakage current input capacitance input rise time input fall time LOW level output voltage output fall time load capacitance 10% to 90% 90% to 10% IOL = 3 mA 3 to 1 V VI = 0 to VDD -0.3 3.0 -10 - - - 0 - - - - - - - - - - - PARAMETER CONDITIONS MIN. TYP.
SAA5254
MAX.
UNIT
+1.5 +10 10 2 2 0.5 200 400
V A pF s s V ns pF
VDD + 0.5 V
1.1 0.45 0.15 3.0 100 V V mA pF
0.2
V V pF mA ns ns
RGBREF RGBREF +0.25 V - - - - - 200 50 -3.3 20 20
0.4 - 2.8 VDD 50 20 20
V V V V pF ns ns
IOH = 0 mA; VDD = 5.5 V - VO(max) CL to(r) to(f) allowed output voltage at pin load capacitance output rise time output fall time - - - -
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Philips Semiconductors
Preliminary specification
Integrated VIP and teletext decoder (IVT1.1X)
SYMBOL ODD/EVEN VOL VOH CL to(r) to(f) Vpu VOL CL to(f) LOW level output voltage HIGH level output voltage load capacitance output rise time output fall time 0.6 to 2.2 V 2.2 to 0.6 V IOL = 1.6 mA IOH = -1.6 mA 0 VDD - 0.4 - - - - IOL = 5 mA load resistor of 1.2 k to VDD; measured between VDD - 0.5 and 1.5 V VI = 0 to VDD 0 - - - - - - - - - - - PARAMETER CONDITIONS MIN. TYP.
SAA5254
MAX.
UNIT
0.4 VDD 120 50 50
V V pF ns ns
COR AND Y (OPEN DRAIN) pull-up voltage at pin LOW level output voltage load capacitance output fall time VDD 1.0 25 50 V V pF ns
ILO Tskew Timing
I2C-BUS
output leakage current skew delay between display outputs R, G, B, COR, Y and BLAN
-10 -
- -
+10 20
A ns
(see Fig.3) clock LOW period clock HIGH period data set-up time data hold time set-up time from clock HIGH to STOP START set-up time following a STOP START hold time START set-up time following clock LOW-to-HIGH transition 4 4 250 170 4 4 4 4 - - - - - - - - - - - - - - - - s s ns ns s s s s
tLOW tHIGH tSU;DAT tHD;DAT tSU;STO tBUF tHD;STA tSU;STA Notes
1. This current is the maximum allowed into the inputs when line and field flyback signals are connected to these inputs. Series current limiting resistors must be used to limit the input currents to 1 mA. 2. RGBREF is the positive supply for the RGB output pins and it must be able to source the IOH current from the R, G and B pins. The leakage specification on RGBREF only applies when there is no current load on the RGB pins.
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Philips Semiconductors
Preliminary specification
Integrated VIP and teletext decoder (IVT1.1X)
SAA5254
handbook, full pagewidth
SDA
t BUF
t LOW
tf
SCL t HIGH t SU;DAT
t HD;STA
tr
t HD;DAT
SDA
MBC764
t SU;STA
t SU;STO
Fig.3 I2C-bus timing.
TIMING CHAIN
handbook, full pagewidth LSP
(TCS) 0 4.66 40 s R, G, B, Y (1) 0 16.67 (a) display period 56.67 s 64 s
lines 42 to 291 inclusive (and 355 to 604 inclusive interlaced) R, G, B, Y (1) 0 41 (b) display period 312 291 line numbers
MLA662 - 1
(1)
Also BLAN in character and box blanking.
Fig.4 Display output timing (a) line rate (b) field rate.
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11
handbook, full pagewidth
1996 Nov 07
64 s 32 34.33 64 s 27.33 32 59.33 64 s
0
4.66
Philips Semiconductors
LSP (Line Sync Pulse)
0 2.33
EP (Equalizing Pulse)
0
Integrated VIP and teletext decoder (IVT1.1X)
BP (Broad Pulse)
621 (308) 622 (309) 1 2 3 4 5
623 (310)
624 (311)
625 (312)
6
7
12
310 311 312 313 314 (1) 315 (2) 316 (3) 317 (4) 309 310 311 312 1 2 3 4 5
TCS interlaced
309
318 (5)
319 (6)
320 (7)
TCS interlaced
308
6
7
TCS non-interlaced
MLA037 - 2
SAA5254
LSP, EP and BP are combined to give TCS as shown. All timings are measured from falling edge of LSP. Line numbers placed in the middle of the line. Equivalent count numbers in brackets. TCS is available on STTV/LFB pin.
Preliminary specification
Fig.5 Composite sync waveforms.
FIRST FIELD START (EVEN) 622 (309) 1 2 3 4 5 6 7 623 (310) 624 (311) 625 (312)
1996 Nov 07
2 s 48 s
621 (308)
Philips Semiconductors
TCS interlaced
ODD/EVEN output (normal sync mode)
ODD/EVEN output (normal sync mode when VCS to SCS mode active)
Integrated VIP and teletext decoder (IVT1.1X)
ODD/EVEN output (slave sync mode) 31 s
13
SECOND FIELD START (ODD) 310 311 312 313 314 (1) 315 (2) 316 (3) 317 (4) 2 s 16 s 31 s
309
318 (5)
319 (6)
320 (7)
TCS interlaced
ODD/EVEN output (normal sync mode)
ODD/EVEN output (normal sync mode when VCS to SCS mode active)
ODD/EVEN output (slave sync mode)
MBA073 - 4
Line numbers placed in the middle of the line. Equivalent count numbers in brackets.
Preliminary specification
SAA5254
Fig.6 ODD/EVEN timing.
Philips Semiconductors
Preliminary specification
Integrated VIP and teletext decoder (IVT1.1X)
ON-CHIP MEMORY SAA5254 page memory organization
SAA5254
The organization of the page memory is shown in Fig.7. The device provides an additional row as compared with first generation decoders; this brings the display format up to 40 characters by 25 rows. Rows 0 to 23 form the teletext page; Row 24 is available for software generated status messages and FLOF/FASTEXT prompt information.
7 characters for status 7 1
fixed character written by IVT hardware alphanumerics white for normal alphanumerics green when looking for display page 24 24 characters from page header rolling when display page looked for
8 characters always rolling (time) 8
ROW 0 1 2 3 4
MAIN PAGE DISPLAY AREA
5 to 20
PACKET X / 22 PACKET X / 23 PACKET X / 24 STORED HERE IF R0D7 = 1 10 14 10 bytes for received page information 14 bytes free for use by microcontroller
21 22 23 24 25
MBA274
Fig.7 Basic page memory organization.
REMARK TO Fig.7
Row 0
ROW PACKET X / 24 if R0D7 = 0 PACKET X / 27 / 0 PACKETS 8 / 30 / 0 to 15
MBA275 - 2
0 1 2
Row 0 is for the page header. The first seven columns (0 to 6) are free for status messages. The eighth is an alphanumeric white or green control character, written automatically by the SAA5254 to give a green rolling header when a page is being looked for. The last eight characters are for rolling time.
Row 25
The first 10 bytes of Row 25 contain control data relating to the received page as shown in Table 5. The remaining 14 bytes are free for use by the microcontroller. 14
Fig.8 Organization of the extension memory.
1996 Nov 07
Philips Semiconductors
Preliminary specification
Integrated VIP and teletext decoder (IVT1.1X)
Table 5 Row 25 received control data format ROW 25 D0 D1 D2 D3 D4 D5 D6 D7 Column Table 6 PU0 PU1 PU2 PU3 0 0 0 0 PT0 PT1 PT2 PT3 0 0 0 1 MU0 MU1 MU2 MU3 0 0 0 2 MT0 MT1 MT2 C4 0 0 0 3 HU0 HU1 HU2 HU3 0 0 0 4 HT0 HT1 C5 C6 0 0 0 5 C7 C8 C9 C10 0 0 0 6 C11 C12 C13 C14 0 0 0 7
SAA5254
MAG0 MAG1 MAG2 0 0 0 0 8
0 0 0 0 0 PBLF 0 0 9
HAM.ER HAM.ER HAM.ER HAM.ER HAM.ER HAM.ER HAM.ER HAM.ER FOUND
Page number and sub-code for Table 5 DESCRIPTION
Register maps SAA5254 mode registers R0 to R11 are shown in Table 7. R0 to R10 are WRITE only; R11 is READ/WRITE. Register map (R3), for page requests, is shown in detail in Table 9.
BIT NAME Page number MAG PU PT PBLF FOUND HAM.ER Page sub-code MU MT HU HT C4 to C14 magazine page units page tens
page being looked for LOW for page has been found Hamming error in corresponding byte
minutes units minutes tens hours units hours tens transmitted control bits
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15
Table 7 D6 FREE RUN PLL ACQ ON/OFF DISABLT PKT 26 - TB START COLUMN SC2 PRD2 - TEXT IN TEXT IN BOX ON 24 - R2 C2 D2 ROM VER R0 - PON OUT PON OUT BOX ON 1 to 23 - R1 C1 D1 TEXT SIGNAL QUALITY PRD1 - PON IN PON IN BOX ON 0 - R0 C0 D0 VCS SIGNAL QUALITY START COLUMN SC1 - START COLUMN SC0 PRD0 DEW/ FULL FIELD TCS ON T1 T0 AUTO ODD/EVEN DISABLE HDR ROLL DISPLAY STATUS ROW ONLY DISABLE ODD/EVEN - R11/R11B SELECT D5 D4 D3 D2 D1 D0
Register map (notes 1 to 5)
REGISTER
D7
1996 Nov 07 - - PRD4 - COR IN COR IN BOTTOM HALF DOUBLE HEIGHT - R3 C3 D3 - R4 C4 D4 TEXT OUT TEXT OUT - PRD3 - BKGND IN BKGND IN COR OUT COR OUT - -
NAME
No.
Philips Semiconductors
Advanced control
0
X/24 POS
Mode
1
VCS TO SCS 7 + P/ 8-BIT
Page request address
2
-
Page request data
3
-
-
Display control (normal)
5
BKGND OUT
Integrated VIP and teletext decoder (IVT1.1X)
Display control (newsflash /subtitle)
6
BKGND OUT
Display mode - CLEAR MEMORY - C5 D5 D6 A0 -
7
STATUS TOP CURSOR ON REVEAL ON
16 ROM VER R4 ROM VER R3 ROM VER R2 ROM VER R1
-
Cursor row
9
-
Cursor column
10
-
Cursor data
11
D7
Device status
11B 625/525 SYNC
Preliminary specification
SAA5254
Philips Semiconductors
Preliminary specification
Integrated VIP and teletext decoder (IVT1.1X)
Notes to Table 7
SAA5254
1. The dash (-) indicates these bits are inactive and must be written to logic 0 for future compatibility. 2. All bits in Registers R0 to R13 are cleared to logic 0 on power-up except bits D0 and D1 of Registers R1, R5 and R6 which are set to logic 1. 3. All memory is cleared to space (00100000) on power-up, except Row 0 Column 7 Chapter 0, which is alpha white (00000111) as the acquisition circuit is enabled but all pages are on hold. 4. TB must be set to logic 0 for normal operation. 5. The I2C-bus slave address is 00110001. Table 8 Register description FUNCTION
REGISTER BIT D0 TO D7 R0 AVANCED CONTROL - auto-increments to Register 1 R11/R11B SELECT DISABLE ODD/EVEN DISPLAY STATUS ROW
Selects reading of R11 if LOW or if HIGH R11B. Forces ODD/EVEN output LOW when logic 1. When SET = 1 and R1D6 = 1 open (8-bit mode) then all the text display is blanked out apart from the status row, this allows the page memory to be used for non-textural data, such as in the German TOP system. Disables green rolling header and time. When SET forces ODD/EVEN LOW if any TV picture displayed, if DISABLE ODD/EVEN = 0 Will force the display PLL to free run in all conditions. Automatic display of FASTEXT prompt row when logic 1.
DISABLE HDR ROLL AUTO ODD/EVEN FREE RUN PLL X/24 POS
R1 MODE - auto-increments to Register 2 T0, T1 TCS ON DEW/FULL FIELD ACQ ON/OFF 7 + P/8-BIT DISABLE PKT 26 VCS TO SCS Interlace/non-interlace 312/313 line control (see Table 10). Text composite sync or direct sync select (see Table 10 for FFB mode selection). Field-flyback or full-channel mode. Acquisition circuits turned off when logic 1. 7 bits with parity checking or 8-bit mode. Disable automatic processing of packet 26. When logic 1 enables display of messages with 60 Hz input signal.
R2 PAGE REQUEST ADDRESS - auto-increments to Register 3 START COLUMN SC0 to SC2 TB Point to start column for page request data (see Table 9). Must be logic 0 for normal operation.
R3 PAGE REQUEST DATA - does not auto-increment (see Table 9) R5 NORMAL DISPLAY CONTROL - auto-increments to Register 6 R6 NEWSFLASH/SUBTITLE DISPLAY CONTROL - auto-increments to Register 7; note 1 PON TEXT COR BKGND Picture on. Text on. Contrast reduction on. Background colour on.
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Philips Semiconductors
Preliminary specification
Integrated VIP and teletext decoder (IVT1.1X)
REGISTER BIT D0 TO D7 R7 DISPLAY MODE - does not auto-increment BOX ON 0 BOX ON 1 to 23 BOX ON 24 DOUBLE HEIGHT BOTTOM HALF REVEAL ON CURSOR ON STATUS TOP Boxing function allowed on Row 0. Boxing function allowed on Rows1 to 23. Boxing function allowed on Row 24. To display double height text. To select bottom half of page when DOUBLE HEIGHT = 1. To reveal concealed text. To display cursor. Row 25 displayed above or below the main text. Active row for data written to or read from memory via the I2C-bus. FUNCTION
SAA5254
R9 CURSOR ROW - auto-increments to Register 10 R0 to R4 A0 CLEAR MEM Selects display memory page (when = 0) or extension memory (when = 1). When set to logic 1, clears the display memory. This bit is automatically reset. Active column for data written to or read from memory via the I2C-bus. Data read from/written to memory via I2C-bus, at location pointed to by R9 and R10. This location automatically increments each time R11 is accessed.
R10 CURSOR COLUMN - auto-increments to Register 11 or 11B C0 to C5
R11 CURSOR DATA - does not auto-increment D0 to D7
R11B DEVICE STATUS - does not auto-increment VCS SIGNAL QUALITY TEXT SIGNAL QUALITY ROM VER R0 to R4 625/525 SYNC Note 1. These functions have IN and OUT referring to inside and outside the boxing function respectively. Indicates that the video signal quality is good and PLL is phase-locked to input video when logic 1. If a good teletext signal is being received then logic 1. Indicated language/ROM variant. For Western European = 11000. If the input video is a 525 line signal then logic 1.
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Philips Semiconductors
Preliminary specification
Integrated VIP and teletext decoder (IVT1.1X)
Table 9 Register map for page requests (R3) PRD4 DO CARE Magazine 1 2 3 4 5 6 DO CARE Page tens DO CARE Page units DO CARE Hours tens DO CARE Hours units DO CARE Minutes tens DO CARE Minutes units Notes to Table 9 1. Abbreviations are as for Table 5 except for DO CARE bits. MU3 MU2 MU1 X MT2 MT1 HU3 HU2 HU1 X X HT1 PU3 PU2 PU1 PT3 PT2 PT1 HOLD MAG2 MAG1 PRD3 PRD2 PRD1
SAA5254
START COLUMN 0
PRD0 MAG0 PT0 PU0 HT0 HU0 MT0 MU0
2. When the DO CARE bit is set to logic 1 this means the corresponding digit is to be taken into account for page requests. If the DO CARE bit is set to logic 0 the digit is ignored. This allows, for example, normal or timed page selection. 3. If HOLD is set LOW, the page is held and not updated. 4. Columns auto-increment on successive I2C-bus transmission bytes. 5. X = Don't care. Table 10 Interlace/non-interlace 312/313 line control and ODD/EVEN field detection option TCS ON FFB MODE(1) X X X 0 1 Notes 1. X = don't care. 2. Reverts to interlaced mode if a newsflash or subtitle is being displayed. T1 0 0 1 1 1 T0 0 1 0 1 1 interlaced 312.5/312.5 lines non-interlaced 312/313 lines (note 2) non-interlaced 312/313 lines (note 2) SCS (scan composite sync) mode: FFB leading edge in first broad pulse of field SCS (scan composite sync) mode: FFB leading edge in second broad pulse of field RESULT
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Philips Semiconductors
Preliminary specification
Integrated VIP and teletext decoder (IVT1.1X)
CLOCK SYSTEMS Crystal oscillator
SAA5254
The crystal is a conventional 2-pin design operating at 27 MHz. It is capable of oscillating with both fundamental and third overtone mode crystals. External components should be used to suppress the fundamental output of the third overtone, as shown in Fig.9. The crystal characteristics are given in Table 11.
handbook, full pagewidth
VDD1
1
SAA5254
OSCOUT 15 pF 8.2 pF 100 nF 1 nF 3.3 H 27 MHz 3rd overtone OSCIN
2 CRYSTAL OSCILLATOR 3
3.3 k
OSCGND
4
MGD702
Fig.9 Crystal oscillator application diagram.
Table 11 Crystal characteristics (see Fig.9) SYMBOL Crystal (27 MHz, 3rd overtone) C1 C0 CL Rr R1 Xa Xj Xd series capacitance parallel capacitance load capacitance resonance resistance series resistance ageing adjustment tolerance drift 1.7 5.2 20 - 20 - - - - - - 50 - 5 x 10-6 25 x 10-6 25 x 10-6 pF pF pF year-1 PARAMETER TYP. MAX. UNIT
1996 Nov 07
20
Philips Semiconductors
Preliminary specification
Integrated VIP and teletext decoder (IVT1.1X)
CHARACTER SETS
SAA5254
The WST specification allows the selection of national character sets via the page header transmission bits, C12 to C14. The basic 96 character sets differ only in 13 national option characters as indicated in Tables 17, 18, 19 and 20 with reference to their table position in the basic character matrix illustrated in Table 16. The SAA5254 automatically decodes transmission bits C12 to C14. Tables 12, 13, 14 and 15 illustrates the character matrixes.
MLA663 handbook, full pagewidth
alphanumerics and graphics 'space' character 0000010
alphanumerics character 1011010
alphanumerics or blast-through alphanumerics character 0001001
alphanumerics character 1111111
contiguous graphics character 0110111
separated graphics character 0110111 =
separated graphics character 1111111 background colour
contiguous graphics character 1111111 display = colour
Fig.10 Character format.
1996 Nov 07
21
Philips Semiconductors
Preliminary specification
Integrated VIP and teletext decoder (IVT1.1X)
Table 12 SAA5254P/E character data input decoding, West European languages; notes 1 to 9 For character version number (11000) see Register 11B.
B b8 handbook, full pagewidth I T S b7 b6 b5 b 4 b 3 b 2 b 1 r o w 0 0 0 0 0 column 0 0 0 0 0 1 graphics black graphics red graphics green 0 0 0 1 2 0 or 1 0 1 0 2a 0 0 1 1 3 0 or 1 0 1 1 3a 0 0 1 1 4 0 1 0 0 5 0 1 0 1 6 0 1 1 0 6a 7 0 1 1 1 7a 8 1 0 0 0 9 1 0 0 1 12 1 1 0 0 13 1 1 0 1
SAA5254
1 1 1 0 14
1 1 1 1 15
alpha numerics black alpha numerics red alpha numerics green alpha numerics yellow alpha numerics blue alpha numerics magenta alpha numerics cyan alpha numerics white flash
(2) (2)
0
0
0
1
1
0
0
1
0
2
0
0
1
1
3
graphics yellow
0
1
0
0
4
graphics blue graphics magenta
0
1
0
1
5
0
1
1
0
6
graphics cyan graphics white conceal display
(2)
0
1
1
1
7
1
0
0
0
8
1
0
0
1
9
steady
(2)
contiguous graphics separated graphics
(1)
1
0
1
0
10
end box
1
0
1
1
11
start box
(2)
ESC
(2)
1
1
0
0
12
normal height double height
(1)
black back ground
1
1
0
1
13
new back ground hold graphics
(1) (2)
1
1
1
0
14
SO
1
1
1
1
15
SI
release graphics
MBA429
1996 Nov 07
22
Philips Semiconductors
Preliminary specification
Integrated VIP and teletext decoder (IVT1.1X)
Table 13 SAA5254P/H character data input decoding, East European languages; notes 1 to 9 For character version number (11001) see Register 11B.
handbook, full pagewidth B b8
I T S b7 b6 b5 b 4 b 3 b 2 b 1 r o w 0 0 0 0 0 column 0
SAA5254
0 0 0 0
0 0 0 1 1 graphics black graphics red graphics green
0 or 1 0 1 0 2
0 0 1 0 2a
0 or 1 0 1 1 3
0 0 1 1 3a
0 1 0 0 4
0 1 0 1 5
0 1 1 0 6 6a
0 1 1 1 7 7a
1 0 0 0 8
1 0 0 1 9
1 1 0 0 12
1 1 0 1 13
1 1 1 0 14
1 1 1 1 15
alpha numerics black alpha numerics red alpha numerics green alpha numerics yellow alpha numerics blue alpha numerics magenta alpha numerics cyan alpha numerics white flash
(2) (2)
0
0
0
1
1
0
0
1
0
2
0
0
1
1
3
graphics yellow
0
1
0
0
4
graphics blue graphics magenta
0
1
0
1
5
0
1
1
0
6
graphics cyan graphics white conceal display
(2)
0
1
1
1
7
1
0
0
0
8
1
0
0
1
9
steady
(2)
contiguous graphics separated graphics
(1)
1
0
1
0
10
end box
1
0
1
1
11
start box
(2)
ESC
(2)
1
1
0
0
12
normal height double height
(1)
black back ground
1
1
0
1
13
new back ground hold graphics
(1) (2)
1
1
1
0
14
SO
1
1
1
1
15
SI
release graphics
MLA961
1996 Nov 07
23
Philips Semiconductors
Preliminary specification
Integrated VIP and teletext decoder (IVT1.1X)
SAA5254
Table 14 SAA5254P/T character data input decoding, West European and Turkish languages; notes 1 to 9 For character version number (11010) see Register 11B.
handbook, full pagewidth b8 B
I T S b7 b6 b5 b 4 b 3 b2 b 1 r o w 0 0 0 0 0 column 0 0 0 0 0 1 graphics black graphics red graphics green 0 0 0 1 2 0 or 1 0 1 0 2a 0 0 1 1 3 0 or 1 0 1 1 3a 0 0 1 1 4 0 1 0 0 5 0 1 0 1 6 0 1 1 0 6a 7 0 1 1 1 7a 8 1 0 0 0 9 1 0 0 1 12 1 1 0 0 13 1 1 0 1 14 1 1 1 0 15 1 1 1 1
alpha numerics black alpha numerics red alpha numerics green alpha numerics yellow alpha numerics blue alpha numerics magenta alpha numerics cyan alpha numerics white flash
(2) (2)
0
0
0
1
1
0
0
1
0
2
0
0
1
1
3
graphics yellow
0
1
0
0
4
graphics blue graphics magenta
0
1
0
1
5
0
1
1
0
6
graphics cyan graphics white conceal display
(2)
0
1
1
1
7
1
0
0
0
8
1
0
0
1
9
steady
(2)
contiguous graphics separated graphics
(1)
1
0
1
0
10
end box
1
0
1
1
11
start box
(2)
ESC
(2)
1
1
0
0
12
normal height double height
(1)
black back ground
1
1
0
1
13
new back ground hold graphics
(1) (2)
1
1
1
0
14
SO
1
1
1
1
15
SI
release graphics
MBA431
1996 Nov 07
24
Philips Semiconductors
Preliminary specification
Integrated VIP and teletext decoder (IVT1.1X)
Table 15 SAA5254P/R character data input decoding, Baltic and Cyrillic languages; notes 1 to 9 For character version number (11101) see Register 11B.
B I T S b8 b7 b6 b5 b 4 b 3 b 2 b 1 r o w 0 0 0 0 0 column 0 0 0 0 0 1 graphics black graphics red graphics green graphics yellow 0 0 0 1 2 0 or 1 0 1 0 2a 0 0 1 1 3 0 or 1 0 1 1 3a 0 0 1 1 4 0 1 0 0 5 0 1 0 1 6 0 1 1 0 6a 7 0 1 1 1 7a 8 1 0 0 0 9 1 0 0 1 12 1 1 0 0 1 1
SAA5254
1 1 0 1 13 14 1 0
1 1 1 1 15
alpha numerics black alpha numerics red alpha numerics green alpha numerics yellow alpha numerics blue alpha numerics magenta alpha numerics cyan alpha numerics white flash
(2) (2)
0
0
0
1
1
0
0
1
0
2
0
0
1
1
3
0
1
0
0
4
graphics blue graphics magenta
0
1
0
1
5
handbook, full pagewidth 0 011
6
graphics cyan
0
1
1
1
7
graphics white conceal display
(2)
1
0
0
0
8
1
0
0
1
9
steady
(2)
contiguous graphics separated graphics
1
0
1
0
10
end box
1
0
1
1
11
start box
(2)
TWIST
(2)
1
1
0
0
12
normal height double height
(1)
black back ground
1
1
0
1
13
new back ground hold graphics
(1) (2)
1
1
1
0
14
SO
1
1
1
1
15
SI
release graphics
MBA648 - 1
1996 Nov 07
25
Philips Semiconductors
Preliminary specification
Integrated VIP and teletext decoder (IVT1.1X)
Notes to Tables 12, 13 14 and 15 1. These control characters are reserved for compatibility with other data codes. 2. These control characters are presumed before each row begins. 3. Control characters shown in Columns 0 and 1 are normally displayed as spaces. 4. Characters may be referred to by column and row (for example 2/5 refers to %). 5. Black represents displayed colour. White represents background. 6. The SAA5254 national option characters are illustrated in Tables 17, 18, 19 and 20.
SAA5254
7. Characters 8/6, 8/7, 9/5, 9/6 and 9/7 are special characters for combining with character 8/5 (E, H and T codes only). 8. National option characters will be displayed according to the setting of control bits C12 to C14. These will be mapped into the basic code table into positions shown in Tables 17, 18, 19 and 20. 9. Columns 2a, 3a, 6a and 7a are displayed in graphics mode.
1996 Nov 07
26
SAA5254
Note to Table 16
Preliminary specification
1. Where: NC = national option character position.
full pagewidth
1996 Nov 07
3/8 6/0 NC NC 4/0 4/8 5/0 5/8 6/8 7/0 7/8 3/9 4/1 4/9 5/1 5/9 6/1 6/9 7/1 7/9 3/10 4/2 4/10 5/2 5/10 6/2 6/10 7/2 7/10 3/11 5/11 NC 4/3 4/11 5/3 6/3 6/11 7/3 7/11 NC
Table 16 SAA5254 basic character matrix; note 1
Philips Semiconductors
2/0
2/8
3/0
2/1
2/9
3/1
2/2
2/10
3/2
2/3
2/11
3/3
Integrated VIP and teletext decoder (IVT1.1X)
NC
2/4 3/12 NC 4/4 4/12 5/4 6/4 6/12
2/12
3/4
5/12
7/4
7/12 NC
27
3/13 NC 4/5 4/13 5/5 5/13 6/5 6/13 3/14 4/6 4/14 5/6 5/14 NC 6/6 3/15 4/7 4/15 5/7 5/15 NC 6/7 6/15
NC
2/5
2/13
3/5
7/5
7/13 NC
2/6
2/14
3/6
7/6
7/14 NC
2/7
2/15
3/7
7/7
7/15
MLA630
Philips Semiconductors
Preliminary specification
Integrated VIP and teletext decoder (IVT1.1X)
Table 17 SAA5254P/E national option character set
SAA5254
handbook, full pagewidth
PHCB
(1)
CHARACTER POSITION (COLUMN / ROW) 2/4 4/0 5 / 11 5 / 12 5 / 13 5 / 14 5 / 15 6/0 7 / 11 7 / 12 7 / 13 7 / 14
LANGUAGE C12 C13 C14 2 / 3 ENGLISH 0 0 0
GERMAN
0
0
1
SWEDISH
0
1
0
ITALIAN
0
1
1
FRENCH
1
0
0
SPANISH
1
0
1
MLB458
(1) PHCB are the Page Header Control Bits. Other combinations default to English.
Table 18 SAA5254P/H national option character set
handbook, full pagewidth
PHCB
(1)
CHARACTER POSITION (COLUMN / ROW) 2/4 4/0 5 / 11 5 / 12 5 / 13 5 / 14 5 / 15 6/0 7 / 11 7 / 12 7 / 13 7 / 14
LANGUAGE C12 C13 C14 2 / 3 POLISH 0 0 0
GERMAN
0
0
1
SWEDISH
0
1
0
SERBO-CROAT
1
0
1
CZECHOSLOVAKIA
1
1
0
RUMANIAN
1
1
1
MLA966
(1) PHCB are the Page Header Control Bits. Other combinations default to German. Only the above characters change with the PHCB. All other characters in the basic set are shown in Table 16.
1996 Nov 07
28
Philips Semiconductors
Preliminary specification
Integrated VIP and teletext decoder (IVT1.1X)
Table 19 SAA5254P/T national option character set
SAA5254
andbook, full pagewidth
PHCB
(1)
CHARACTER POSITION (COLUMN / ROW) 2/4 4/0 5 / 11 5 / 12 5 / 13 5 / 14 5 / 15 6/0 7 / 11 7 / 12 7 / 13 7 / 14
LANGUAGE C12 C13 C14 2 / 3 ENGLISH 0 0 0
GERMAN
0
0
1
TURKISH
1
1
0
ITALIAN
0
1
1
FRENCH
1
0
0
SPANISH
1
0
1
MBA430
(1) PHCB are the Page Header Control Bits. Other combinations default to English. Only the above characters change with the PHCB. All other characters in the basic set are shown in Table 16.
1996 Nov 07
29
Philips Semiconductors
Preliminary specification
Integrated VIP and teletext decoder (IVT1.1X)
Table 20 SAA5254P/R national option character set
SAA5254
handbook, full pagewidth
PHCB
(1)
CHARACTER POSITION (COLUMN / ROW) 2/4 4/0 5 / 11 5 / 12 5 / 13 5 / 14 5 / 15 6 / 0 7 / 11 7 / 12 7 / 13 7 / 14
LANGUAGE C12 C13 C14 2 / 3 ESTONIAN LETTISH / LITHUANIAN RUSSIAN 0 1 0
0
1
1
1
0
0
2
3
4
5
6
7
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
MEA597
(1) PHCB are the Page Header Control Bits. Other combinations default to Estonian.
1996 Nov 07
30
Philips Semiconductors
Preliminary specification
Integrated VIP and teletext decoder (IVT1.1X)
APPLICATION INFORMATION
SAA5254
V DD1
1
40 39
OSCOUT C4 1 nF R1 3.3 k X1 27 MHz, 3rd Overtone V DD VSS VSS 100 nF L1 3.3 H C3 C2 C1
2
38 37
15 pF 8.2 pF 100 nF OSCIN
3
36 35
OSCGND VSS1 REF
4 5 6 7 8 34 33 32 31 i.c.
C7 100 nF BLACK 100 nF
VSS CVBS R17 27 k C8 100 nF
IREF POL
9 10 11 12 13 14 15 16
SAA5254
30 29 28 27 25 25 24 SDA SCL Y ODD/EVEN COR 2.7 k 2.7 k VDD
VDD2
STTV/LFB VDDD LK2 LK1 VSS2 R (1) R10 B (1) VSS (1) BLAN VSS3 RGBREF R9 G VCR/FFB
17 18 19 20
MLB210
23 22 21
VDD
(1) Value dependent on application.
Fig.11 Application diagram; SOT129 (DIP40).
1996 Nov 07
31
Philips Semiconductors
Preliminary specification
Integrated VIP and teletext decoder (IVT1.1X)
PACKAGE OUTLINE DIP40: plastic dual in-line package; 40 leads (600 mil)
SAA5254
SOT129-1
seating plane
D
ME
A2
A
L
A1 c Z e b1 b 40 21 MH wM (e 1)
pin 1 index E
1
20
0
5 scale
10 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. 4.7 0.19 A1 min. 0.51 0.020 A2 max. 4.0 0.16 b 1.70 1.14 0.067 0.045 b1 0.53 0.38 0.021 0.015 c 0.36 0.23 0.014 0.009 D
(1)
E
(1)
e 2.54 0.10
e1 15.24 0.60
L 3.60 3.05 0.14 0.12
ME 15.80 15.24 0.62 0.60
MH 17.42 15.90 0.69 0.63
w 0.254 0.01
Z (1) max. 2.25 0.089
52.50 51.50 2.067 2.028
14.1 13.7 0.56 0.54
Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT129-1 REFERENCES IEC 051G08 JEDEC MO-015AJ EIAJ EUROPEAN PROJECTION
ISSUE DATE 92-11-17 95-01-14
1996 Nov 07
32
Philips Semiconductors
Preliminary specification
Integrated VIP and teletext decoder (IVT1.1X)
SOLDERING Introduction There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used. This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our "IC Package Databook" (order code 9398 652 90011). Soldering by dipping or by wave The maximum permissible temperature of the solder is 260 C; solder at this temperature must not be in contact with the joint for more than 5 seconds. The total contact time of successive solder waves must not exceed 5 seconds.
SAA5254
The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified maximum storage temperature (Tstg max). If the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. Repairing soldered joints Apply a low voltage soldering iron (less than 24 V) to the lead(s) of the package, below the seating plane or not more than 2 mm above it. If the temperature of the soldering iron bit is less than 300 C it may remain in contact for up to 10 seconds. If the bit temperature is between 300 and 400 C, contact may be up to 5 seconds.
1996 Nov 07
33
Philips Semiconductors
Preliminary specification
Integrated VIP and teletext decoder (IVT1.1X)
DEFINITIONS Data sheet status Objective specification Preliminary specification Product specification Limiting values
SAA5254
This data sheet contains target or goal specifications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications.
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. PURCHASE OF PHILIPS I2C COMPONENTS
Purchase of Philips I2C components conveys a license under the Philips' I2C patent to use the components in the I2C system provided the system conforms to the I2C specification defined by Philips. This specification can be ordered using the code 9398 393 40011.
1996 Nov 07
34
Philips Semiconductors
Preliminary specification
Integrated VIP and teletext decoder (IVT1.1X)
NOTES
SAA5254
1996 Nov 07
35
Philips Semiconductors - a worldwide company
Argentina: see South America Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113, Tel. +61 2 9805 4455, Fax. +61 2 9805 4466 Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213, Tel. +43 1 60 101, Fax. +43 1 60 101 1210 Belarus: Hotel Minsk Business Center, Bld. 3, r. 1211, Volodarski Str. 6, 220050 MINSK, Tel. +375 172 200 733, Fax. +375 172 200 773 Belgium: see The Netherlands Brazil: see South America Bulgaria: Philips Bulgaria Ltd., Energoproject, 15th floor, 51 James Bourchier Blvd., 1407 SOFIA, Tel. +359 2 689 211, Fax. +359 2 689 102 Canada: PHILIPS SEMICONDUCTORS/COMPONENTS, Tel. +1 800 234 7381 China/Hong Kong: 501 Hong Kong Industrial Technology Centre, 72 Tat Chee Avenue, Kowloon Tong, HONG KONG, Tel. +852 2319 7888, Fax. +852 2319 7700 Colombia: see South America Czech Republic: see Austria Denmark: Prags Boulevard 80, PB 1919, DK-2300 COPENHAGEN S, Tel. +45 32 88 2636, Fax. +45 31 57 1949 Finland: Sinikalliontie 3, FIN-02630 ESPOO, Tel. +358 9 615800, Fax. +358 9 61580/xxx France: 4 Rue du Port-aux-Vins, BP317, 92156 SURESNES Cedex, Tel. +33 1 40 99 6161, Fax. +33 1 40 99 6427 Germany: Hammerbrookstrae 69, D-20097 HAMBURG, Tel. +49 40 23 53 60, Fax. +49 40 23 536 300 Greece: No. 15, 25th March Street, GR 17778 TAVROS/ATHENS, Tel. +30 1 4894 339/239, Fax. +30 1 4814 240 Hungary: see Austria India: Philips INDIA Ltd, Shivsagar Estate, A Block, Dr. Annie Besant Rd. Worli, MUMBAI 400 018, Tel. +91 22 4938 541, Fax. +91 22 4938 722 Indonesia: see Singapore Ireland: Newstead, Clonskeagh, DUBLIN 14, Tel. +353 1 7640 000, Fax. +353 1 7640 200 Israel: RAPAC Electronics, 7 Kehilat Saloniki St, TEL AVIV 61180, Tel. +972 3 645 0444, Fax. +972 3 649 1007 Italy: PHILIPS SEMICONDUCTORS, Piazza IV Novembre 3, 20124 MILANO, Tel. +39 2 6752 2531, Fax. +39 2 6752 2557 Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku, TOKYO 108, Tel. +81 3 3740 5130, Fax. +81 3 3740 5077 Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL, Tel. +82 2 709 1412, Fax. +82 2 709 1415 Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR, Tel. +60 3 750 5214, Fax. +60 3 757 4880 Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905, Tel. +9-5 800 234 7381 Middle East: see Italy Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB, Tel. +31 40 27 82785, Fax. +31 40 27 88399 New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND, Tel. +64 9 849 4160, Fax. +64 9 849 7811 Norway: Box 1, Manglerud 0612, OSLO, Tel. +47 22 74 8000, Fax. +47 22 74 8341 Philippines: Philips Semiconductors Philippines Inc., 106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI, Metro MANILA, Tel. +63 2 816 6380, Fax. +63 2 817 3474 Poland: Ul. Lukiska 10, PL 04-123 WARSZAWA, Tel. +48 22 612 2831, Fax. +48 22 612 2327 Portugal: see Spain Romania: see Italy Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW, Tel. +7 095 247 9145, Fax. +7 095 247 9144 Singapore: Lorong 1, Toa Payoh, SINGAPORE 1231, Tel. +65 350 2538, Fax. +65 251 6500 Slovakia: see Austria Slovenia: see Italy South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale, 2092 JOHANNESBURG, P.O. Box 7430 Johannesburg 2000, Tel. +27 11 470 5911, Fax. +27 11 470 5494 South America: Rua do Rocio 220, 5th floor, Suite 51, 04552-903 Sao Paulo, SAO PAULO - SP, Brazil, Tel. +55 11 821 2333, Fax. +55 11 829 1849 Spain: Balmes 22, 08007 BARCELONA, Tel. +34 3 301 6312, Fax. +34 3 301 4107 Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM, Tel. +46 8 632 2000, Fax. +46 8 632 2745 Switzerland: Allmendstrasse 140, CH-8027 ZURICH, Tel. +41 1 488 2686, Fax. +41 1 481 7730 Taiwan: PHILIPS TAIWAN Ltd., 23-30F, 66, Chung Hsiao West Road, Sec. 1, P.O. Box 22978, TAIPEI 100, Tel. +886 2 382 4443, Fax. +886 2 382 4444 Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd., 209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260, Tel. +66 2 745 4090, Fax. +66 2 398 0793 Turkey: Talatpasa Cad. No. 5, 80640 GULTEPE/ISTANBUL, Tel. +90 212 279 2770, Fax. +90 212 282 6707 Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7, 252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461 United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes, MIDDLESEX UB3 5BX, Tel. +44 181 730 5000, Fax. +44 181 754 8421 United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409, Tel. +1 800 234 7381 Uruguay: see South America Vietnam: see Singapore Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD, Tel. +381 11 625 344, Fax.+381 11 635 777
For all other countries apply to: Philips Semiconductors, Marketing & Sales Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825 (c) Philips Electronics N.V. 1996
Internet: http://www.semiconductors.philips.com
SCA52
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
537021/00/02/pp36
Date of release: 1996 Nov 07
Document order number:
9397 750 01015

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